ESP32-S3

Type: chip · Vendor: espressif

Espressif ESP32-S3 SoC family (dual-core LX7, native USB).

The ESP32-S3 is Espressif’s SoC family for embedded applications: two 32-bit Xtensa LX7 application cores, a 2.4 GHz radio (Wi-Fi and Bluetooth Low Energy) and native USB, all integrated in the chip. In MCUID’s hardware chain — chip → module → board — this page describes what the chip family provides; the pins, connectors and flash capacity you can actually use are decided one level down, by the module and the board you choose.

Start from a board: ESP32-S3-DevKitC-1 — the board this site documents for the chip. Official entry: ESP-IDF ESP32-S3 get started.

Processing — dual Xtensa 32-bit LX7 cores, plus an ultra-low-power coprocessor that keeps small tasks running while the main cores sleep.
Wireless — 2.4 GHz Wi-Fi and Bluetooth Low Energy, on-chip.
USB — USB OTG and a USB Serial/JTAG controller, both native to the chip.

Capabilities — what the chip family provides

Each row is one capability: the official wording, what it means in development, and the source. The scope is the ESP32-S3 SoC itself. Clock frequency, SRAM size and wireless protocol versions are datasheet numbers; the table sticks to what the cited overview states.

Capability	What it is · what it means for development	Source
Dual-core Xtensa 32-bit LX7 CPU	“Dual high performance Xtensa® 32-bit LX7 CPU cores” (official wording). Your application code runs on two identical 32-bit cores. The clock frequency is a datasheet number and is not quoted here.	ESP-IDF v6.1
2.4 GHz Wi-Fi	“Wi-Fi (2.4 GHz band)” (official wording). The radio is integrated in the SoC — no external Wi-Fi module. Protocol-version details belong to the datasheet.	ESP-IDF v6.1
Bluetooth Low Energy	“Bluetooth Low Energy” (official wording). BLE on-chip. The same source list does not mention classic Bluetooth for this chip.	ESP-IDF v6.1
USB OTG interface	“USB OTG interface” (official wording). A native USB peripheral. Whether your board wires it to a USB connector is a board fact, not a chip fact.	ESP-IDF v6.1
USB Serial/JTAG controller	“USB Serial/JTAG Controller” (official wording). Built-in flashing and debugging over USB, independent of any external USB-to-UART bridge; a board still decides which connectors exist.	ESP-IDF v6.1
Ultra-low-power coprocessor	“Ultra Low Power co-processor running either RISC-V or FSM core” (official wording). Small tasks can continue while the main cores sleep; how low a given project’s consumption goes depends on software and board wiring.	ESP-IDF v6.1

Before you rely on a capability — scope and limits

Chip capability is not header availability. GPIO count and mux options are chip facts; which pins reach a header, and under what conditions, is decided by the module and the board.
Flash and PSRAM capacity belong to the module variant. Modules like the ESP32-S3-WROOM-1 come in variants (N8, N8R2, N8R8, N16R8) whose suffixes encode flash and PSRAM; check the module page for memory sizes, not this page.
Onboard LED wiring is a board fact — and a revision fact. On the DevKitC-1 the addressable RGB LED moved between GPIO48 (v1.0) and GPIO38 (v1.1); nothing on this chip page overrides that.
Which USB ports you get is a board decision. The chip provides USB OTG and USB Serial/JTAG; whether a board exposes them on connectors, and next to which USB-to-UART bridge, is per-board wiring. On the DevKitC-1 the two ports are different chains — see the USB troubleshooting guide.
GPIO 35–37 are conditional, not banned. Whether those pins are free depends on the fitted module variant — the decision table lives in GPIO 35/36/37.
Framework support for a radio feature is a software question. The radio is chip hardware; whether a given SDK build exposes a feature belongs to that SDK’s documentation.

Modules and boards built on the ESP32-S3

Module variants (flash/PSRAM suffixes) and antenna options live on the module pages; pinouts, revisions and connectors live on the board pages.

Modules built on this chip

ESP32-S3-WROOM-1(N8, N8R2, N8R8, N16R8)
ESP32-S3-WROOM-1U(N8, N8R2, N8R8, N16R8)
ESP32-S3-WROOM-2(N32R16V)

Boards using this chip

ESP32-S3-DevKitC-1

Start developing

ESP-IDF (official SDK) — the ESP-IDF get-started for ESP32-S3 installs the toolchain and walks through the first project. This page links v6.1 throughout.
Arduino IDE — the esp32 board package supports the ESP32-S3; MCUID’s DevKitC-1 first-flash guide covers the two ports, the cable trap and the first blink step by step.
On-board RGB LED — the blink lab compiles a sketch for both DevKitC-1 revisions; the toolchain and library versions are recorded in the lab. The lab is compiled, not hardware-tested by MCUID.
Board in hand but unknown? Identify the module and revision first — which DevKitC-1 do I have? — and pick GPIO defaults from there, not from this chip page.

Common questions this site answers

Which ESP32-S3-DevKitC-1 do I have? — identify board and revision before trusting any pin assignment.
Why is the onboard LED GPIO38 or GPIO48? — the revision-dependent LED wiring behind “the LED pin”.
Can I use GPIO 35, 36 or 37? — the module-conditional pins, with the decision table.
First flash on the DevKitC-1 — ports, cables and a six-row troubleshooting table.

Sources and evidence

Chip capabilities — the table above cites the ESP-IDF v6.1 get-started, ESP32-S3 overview section (docs/en/get-started/index.rst), retrieved 2026-11-09.
Numbers not listed here — clock frequency, SRAM size, GPIO count and wireless protocol versions belong to the datasheet; the table sticks to the overview’s wording.
Board and module facts — live on their own pages with their own sources; nothing on this page overrides them.

Also known as: ESP32S3, esp32s3.